Analog/RF Circuit Design Techniques for Nanometerscale IC Technologies

CMOS evolution introduces several problems in analog design. Gate-leakage mismatch exceeds conventional matching tolerances requiring active cancellation techniques or alternative architectures. One strategy to deal with the use of lower supply voltages is to operate critical parts at higher supply voltages, by exploiting combinations of thin- and thick-oxide transistors. Alternatively, low voltage circuit techniques are successfully developed. In order to benefit from nanometer scale CMOS technology, more functionality is shifted to the digital domain, including parts of the RF circuits. At the same time, analog control for digital and digital control for analog emerges to deal with current and upcoming imperfections

Oneindigheid van het IC Design

In de IC-elektronica is het begrip oneindig (en zijn alter-ego nul) al vele jaren zowel de rode draad als de grote leidraad: er worden steeds weer nieuwere technologieën en (systeem- en circuit)principes ontwikkeld om dichter bij het gewenste nulpunt en dichter bij de nagestreefde oneindigheid te geraken. Verbazingwekkende ontwikkelingen en inzichten zijn het gevolg

A 3 Gb/s optical detector in standard CMOS for 850 nm optical communication

This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-/spl mu/m CMOS technology. A data rate of 3 Gb/s at BER <10/sup -11/ was achieved for /spl lambda/=850 nm with 25-/spl mu/W peak-peak optical power. This data rate is more than four times than that of current state-of-the-art optical detectors in standard CMOS reported so far. High-speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off over more than three decades. The presented solution is applicable to various photodiode structures, wavelengths, and CMOS generations

Design Equations for Class-E Power Amplifiers

In literature, it is widely accepted that the design of Class-E Power Amplifier (PA) with finite dc feed inductance requires a long iterative solution procedure. To avoid such iterative solution methods, analytical design equations should be known. The problem associated with the finite dc feed inductance Class-E PA is usually ascribed to the fact that the circuit element values are transcendental functions of the input parameters which is assumed to prevent the derivation of exact or fully analytical design equations. Using a proper analytical method, exact design solutions for Class-E PA with any inductor value can however be derived. A mathematically exact analysis of the idealized Class-E PA with finite dc feed inductance has been done and analytical expressions showing the relation between the circuit elements and the input parameters are found. These analytical expressions have been simplified to obtain explicit, relatively simple design equations. In this paper, we present these relatively simple design equations. Using these design equations, Class-E PA with finite dc feed inductance can be designed without iterative design procedures. The current paper discusses these simplified versions of the exact solution of general Class-E PA with finite dc feed inductance Key Words- Power Amplifier, Class-E

Integrated Photodiodes in Standard CMOS Technology for CD and DVD Applications

The influence of two different geometries (layouts) and two structures of high-speed photodiodes in fully standard 0.18 /spl mu/m CMOS technology on their intrinsic (physical) and electrical bandwidths is analyzed. In addition, a possible application of the integrated photodiodes for the CD and DVD optical pick-up units is discussed. Two photodiode structures with a highest responsivity are studied: nwell/p-substrate and p+/nwell/p-substrate (double photodiode). The photodiode bandwidths are compared for /spl lambda/=780 nm and /spl lambda/=650 nm wavelength, corresponding to the lasers for CD and DVD, respectively. Slow substrate current component limits the intrinsic bandwidth of nwell/p-substrate and p+/nwell/p-substrate photodiodes to 6MHz and 7MHz, for a CD application as well as 70MHz and 100MHz for a DVD application. The electrical bandwidth of these diodes in combination with typical transimpedance amplifiers, will be always larger than the calculated intrinsic bandwidths meaning that the diode capacitance is not critical in total photoreceiver design

Physical and electrical bandwidths of integrated photodiodes in standard CMOS technology

The influence of different geometries (layouts) and structures of high-speed photodiodes in fully standard 0.18 μm CMOS technology on their intrinsic (physical) and electrical bandwidths is analyzed. Three photodiode structures are studied: nwell/p-substrate, p+/nwell/p-substrate and p+/nwell. The photodiode bandwidths are compared for λ=650 nm wavelength which is used in today's DVD optical pick-ups. Slow substrate current component limits the intrinsic bandwidth of nwell/p-substrate and p+/nwell/p-substrate photodiodes to 70 MHz and 100 MHz, respectively. The electrical bandwidth of these diodes in combination with typical transimpedance amplifiers, will be larger than the calculated intrinsic bandwidths. Thus, the parasitic diode capacitance has almost no influence on the total bandwidth of both photodiodes. By using only a p+/nwell photodiode (not connecting a substrate), the intrinsic diode bandwidth is 1 GHz. However, the electrical bandwidth limitation of this diode due to its parasitic capacitance is important and can limit the total diode bandwidth which is by approximation the lower of the physical and the electrical bandwidth. The calculated responsivity of p+/nwell photodiode is 10 dB lower than in other two defined diodes structures, requiring higher sensitivity of the subsequent electronic circuitry

Monolithically Integrated Photo-Diodes in Standard CMOS Technology for high speed optical communication: General Consideration and Analysis

Photodiodes designed in standard CMOS technology which can be monolithically integrated in high-speed optical receivers are analyzed and the advantages and drawbacks concerning bandwidth with respect to the diode geometry and structure, are discussed. Studied photodiode structures that can be realized in standard CMOS technology are:\ud 1) N-well/Psubstrate,\ud 2) lateral N-well/P-substrate (exploiting only depletion region in between)\ud 3) N+/P-substrate and\ud 4) P+/N-well/P-substrate diodes.\ud The maximal operating frequency as well as the impulse response of the diodes are calculated using 2-D model semiconductor device analysis

On optimal structure and geometry of high-speed integrated photodiodes in a standard CMOS technology

Analyses of the influence of different geometries (layouts) and structures of high-speed CMOS photodiodes on their intrinsic (physical) and electrical bandwidths are presented. Three photodiode structures are studied: nwell/p-substrate, p+/nwell/p-substrate and p+/nwell. According to the author's knowledge, this is a first time that the influence of various structures and geometries (layouts) of CMOS photodiodes on their bandwidth is analytically analysed

Antenna Behaviour in the Presence of Human Body

Mobile phones are widely used nowadays. The demand in the new generations of mobile phones is better performance. Typically the mobile phone performance is derived assuming an ideal antenna impedance of 50Ω. Some work has been done in understanding the behaviour of the antenna impedance in a real environment [1], [2], [3]. This work continued the exploration of the difference between the ideal antenna impedance and the antenna impedance in a real environment. In particular the analysis was carried out measuring the antenna impedance in presence of the human body and relating it to the position of the hand and of the hand + head. Two types of antennas were considered: PIFA antennas and ceramic antennas. Several positions of the hand and of the hand + head were considered. These positions were selected after an accurate study about how people on the street normally handle their mobile phones. The study consisted of two steps: 1) observation of the typical positions of the hand and of the\ud hand + head with respect to the mobile phone; 2) their imitation in the lab for the measurements The outcome of the investigation was the changing of the impedance is primary due to a changing of its imaginary part. The real part is affected but not in dramatic way

Designing analog circuits in CMOS

The evolution in CMOS technology dictated by Moore's Law is clearly beneficial for designers of digital circuits, but it presents difficult challenges, such as lowered nominal supply voltages, for their peers in the analog world who want to keep pace with this rapid progression. This article discusses a number of significant items for analog designs in modern and future CMOS processes and possible ways to maintain performance